| .. |
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_toolchain
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_toolchain.cxx: work around PyPy missing LDCXXSHARED sysconfig variable.
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2020-08-27 06:53:14 +00:00 |
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back
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back.{verilog,rtlil}: adjust $verilog_initial_trigger insertion.
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2020-10-25 01:59:46 +00:00 |
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build
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build.plat: TemplatedPlatform.iter_extra_files→Platform.iter_files.
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2020-11-10 05:30:30 +00:00 |
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compat
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sim: split into base, core, and engines.
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2020-08-27 11:52:31 +00:00 |
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hdl
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hdl.ast: remove dead code. NFC.
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2020-11-21 17:30:28 +00:00 |
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lib
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lib.fifo: fix {r,w}_level in AsyncFIFOBuffered
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2020-11-03 09:34:12 +00:00 |
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sim
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sim._pyrtl: mask Mux selection operand.
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2020-11-14 15:22:34 +00:00 |
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test
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tests: keep comments up to date. NFC.
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2020-10-15 17:02:50 +00:00 |
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vendor
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vendor.xilinx_spartan_3_6: fix typo.
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2020-11-22 00:16:02 +00:00 |
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__init__.py
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CI: fix code coverage collection.
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2020-10-15 18:09:04 +00:00 |
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_unused.py
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_unused: extract must-use logic from hdl.ir.
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2020-02-01 01:35:05 +00:00 |
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_utils.py
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hdl.ir: allow disabling UnusedElaboratable warning in file scope.
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2019-10-26 06:17:14 +00:00 |
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asserts.py
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hdl.ast,back.rtlil: implement Cover.
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2019-09-03 01:32:24 +00:00 |
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cli.py
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Fix commit 8313d6e7.
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2020-11-06 01:54:30 +00:00 |
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rpc.py
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rpc: add public Records as module ports.
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2019-09-30 18:28:21 +00:00 |
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tracer.py
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tracer: fix get_var_name() to work on toplevel attributes.
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2020-05-17 19:51:58 +00:00 |
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utils.py
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{,_}tools→{,_}utils
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2019-10-13 18:53:38 +00:00 |
