Jean-François Nguyen f26e612899 vendor.xilinx_7series: implement.		2019-06-06 13:22:15 +00:00
..
__init__.py	vendor.fpga.lattice_ice40: implement.	2019-06-01 16:47:01 +00:00
lattice_ice40.py	build.{dsl,res,plat}: apply clock constraints to signals, not resources.	2019-06-05 08:52:30 +00:00
xilinx_7series.py	vendor.xilinx_7series: implement.	2019-06-06 13:22:15 +00:00