Commit graph

7 commits

Author SHA1 Message Date
whitequark 2f9dab361f {,_}tools→{,_}utils
In context of nMigen, "tools" means "parts of toolchain", so it is
confusing to have a completely unrelated module also called "tools".
2019-10-13 18:53:38 +00:00
whitequark 9f643ce005 Clean up imports.
This commit:
  * moves lists of universally useful imports from `nmigen` to
    `nmigen.hdl` and `nmigen.lib`, reimporting them in `nmigen`;
  * replaces lots of imports from individual parts of `nmigen.hdl`
    with a star import from `nmigen.hdl`;
  * replaces imports in tests with what we expect downstream code
    to use;
  * adds some missing imports in `nmigen.formal`.
2019-06-04 08:18:50 +00:00
whitequark b42043f764 lib.io: add i_clk and o_clk to pin layout with xdr>=1. 2019-06-03 07:43:31 +00:00
whitequark 1eee7cd76f lib.io: allow dir="oe".
Although a dir="oe" pin is generally equivalent to dir="io" pin with
the i* signal(s) disconnected, they are not equivalent, because some
pins may not be able to support input buffers at all, either because
there are no input buffers, or because the input buffers are consumed
by some other resource.

E.g. this can happen on iCE40 when the input buffer is consumed by
a PLL.
2019-06-03 04:28:53 +00:00
whitequark c30617fc05 lib.io: allow Pin(xdr=0), representing a combinatorial I/O buffer. 2019-06-03 03:36:32 +00:00
whitequark 2b7dc37ffe hdl.rec: allow providing fields during construction.
This allows creating records populated with e.g. signals with custom
names, or sub-records that are instances of Record subclasses.
2019-05-25 22:06:56 +00:00
whitequark 287a0531b3 lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin. 2019-04-15 16:27:23 +00:00