Commit graph

20 commits

Author SHA1 Message Date
whitequark 585514e6ed hdl.ir: rework named port handling for Instances.
The main purpose of this rework is cleanup, to avoid specifying
the direction of input ports in an implicit, ad-hoc way using
the named ports and ports dictionaries.

While working on this I realized that output ports can be connected
to anything that is valid on LHS, so this is now supported too.
2019-04-22 07:46:47 +00:00
whitequark 44711b7d08 hdl.ir: detect elaboratables that are created but not used.
Requres every elaboratable to inherit from Elaboratable, but still
accepts ones that do not, with a warning.

Fixes #3.
2019-04-21 08:52:57 +00:00
whitequark 0a2a7025a6 hdl.xfrm: allow using FragmentTransformer on any elaboratable.
Fixes #29.
2019-04-10 00:23:11 +00:00
whitequark 49eef77c53 hdl: remove deprecated get_fragment() and lower() methods. 2019-04-09 23:53:43 +00:00
whitequark 8ee6bd80ff hdl.ir: raise a more descriptive error on non-elaboratable object. 2019-02-14 20:52:42 +00:00
whitequark 4948162f33 hdl.ir: rename .get_fragment() to .elaborate().
Closes #9.
2019-01-26 02:31:12 +00:00
whitequark 8c96675580 hdl.ast: add Past, Stable, Rose, Fell. 2019-01-17 04:31:27 +00:00
whitequark b534e92dd5 hdl.ir: allow explicitly requesting flattening. 2019-01-14 17:04:23 +00:00
whitequark 040811c2e5 hdl.ir: add an API for retrieving generated values, like FSM signal.
This is useful for tests.
2018-12-26 12:35:35 +00:00
whitequark 68dae9f50e hdl.ir: flatten hierarchy based on memory accesses, too. 2018-12-22 21:43:46 +00:00
whitequark fd89d2fc9d hdl.ir: factor out _merge_subfragment. NFC. 2018-12-22 19:04:49 +00:00
whitequark f6772759c8 hdl.ir: fix port propagation between siblings, in the other direction. 2018-12-22 00:31:31 +00:00
whitequark 913339c04a hdl.ir: fix port propagation between siblings. 2018-12-21 23:53:18 +00:00
whitequark fc7da1be2d hdl.ir: do not flatten instances or collect ports from their statements.
This results in absurd behavior for memories.
2018-12-21 13:52:18 +00:00
whitequark b0bd7bfaca hdl.ir: correctly handle named output and inout ports. 2018-12-21 04:03:03 +00:00
whitequark f7fec804ec ir: allow non-Signals in Instance ports. 2018-12-20 23:40:40 +00:00
whitequark c7f9386eab fhdl.ir: add black-box fragments, fragment parameters, and Instance. 2018-12-17 22:55:39 +00:00
whitequark 8d1639a5a8 hdl, back: add and use SignalSet/SignalDict. 2018-12-17 17:21:29 +00:00
whitequark 015998eba9 hdl.dsl: add clock domain support. 2018-12-16 23:51:24 +00:00
whitequark 790eb05a92 Rename fhdl→hdl, genlib→lib. 2018-12-15 14:25:31 +00:00
Renamed from nmigen/fhdl/ir.py (Browse further)