Commit graph

13 commits

Author SHA1 Message Date
whitequark d048f069f8 hdl.ast: actually remove simulator commands.
These were supposed to be removed in 7df70059, but I forgot.
2019-12-02 02:24:24 +00:00
whitequark 7df70059d1 back.pysim: redesign the simulator.
The redesign introduces no fundamental incompatibilities, but it does
involve minor breaking changes:
  * The simulator commands were moved from hdl.ast to back.pysim
    (instead of only being reexported from back.pysim).
  * back.pysim.DeadlineError was removed.

Summary of changes:
  * The new simulator compiles HDL to Python code and is >6x faster.
    (The old one compiled HDL to lots of Python lambdas.)
  * The new simulator is a straightforward, rigorous implementation
    of the Synchronous Reactive Programming paradigm, instead of
    a pile of ad-hoc code with no particular design driving it.
  * The new simulator never raises DeadlineError, and there is no
    limit on the amount of delta cycles.
  * The new simulator robustly handles multiclock designs.
  * The new simulator can be reset, such that the compiled design
    can be reused, which can save significant runtime with large
    designs.
  * Generators can no longer be added as processes, since that would
    break reset(); only generator functions may be. If necessary,
    they may be added by wrapping them into a generator function;
    a deprecated fallback does just that. This workaround will raise
    an exception if the simulator is reset and restarted.
  * The new simulator does not depend on Python extensions.
    (The old one required bitarray, which did not provide wheels.)

Fixes #28.
Fixes #34.
Fixes #160.
Fixes #161.
Fixes #215.
Fixes #242.
Fixes #262.
2019-11-28 21:05:34 +00:00
whitequark ffd10e3042 back.rtlil: fix lowering of Part() on LHS to account for stride. 2019-10-26 01:52:34 +00:00
whitequark 706bfaf5e1 hdl.ast: deprecate Signal.{range,enum}.
Although constructor methods can improve clarity, there are many
contexts in which it is useful to use range() as a shape: notably
Layout, but also Const and AnyConst/AnyValue. Instead of duplicating
these constructor methods everywhere (which is not even easily
possible for Layout), use casting to Shape, introduced in 6aabdc0a.

Fixes #225.
2019-10-11 13:07:42 +00:00
whitequark 8deb13cea3 lib.cdc: MultiReg→FFSynchronizer.
Fixes #229.
2019-09-23 14:18:45 +00:00
whitequark eb04a2509e hdl.mem,lib,examples: use Signal.range(). 2019-09-08 12:19:13 +00:00
whitequark 5e9587bbbd Remove nmigen.lib from prelude.
Currently it's just MultiReg, and there's no particularly good reason
to privilege this specific CDC primitive so much.
2019-09-06 06:53:06 +00:00
Reto Kramer b0ef53e095 examples/basic/uart: document divisor parameter. 2019-08-22 19:28:40 +00:00
whitequark fa0fa056ba hdl.xfrm: CEInserter→EnableInserter.
Fixes #166.
2019-08-12 13:39:26 +00:00
whitequark 5c63177fc2 test: generate examples to verilog as part of unit tests.
This is to make sure 806a62c2 doesn't happen again.
2019-07-08 10:12:26 +00:00
whitequark c14d074fcc examples/basic/ctr_ce: fix outdated syntax. 2019-07-08 10:12:26 +00:00
whitequark 2b92f12016 examples: add concise UART example.
This example uses shift registers and counters instead of an explicit
FSM, which makes it very compact in terms of generated logic, and
more concise too.
2019-06-27 04:51:45 +00:00
whitequark 3d04122d55 examples: reorganize into examples/basic and examples/board. 2019-06-03 16:17:37 +00:00