|  whitequark | b42620e490 | back.rtlil: match shape of $mux ports A/B/Y. | 2018-12-13 02:35:46 +00:00 |  | 
				
					
						|  whitequark | f0f4c0ce61 | fhdl.ast: bits_sign→shape. | 2018-12-13 02:06:58 +00:00 |  | 
				
					
						|  whitequark | 0fac1f8d0f | fhdl.dsl: comb/sync/sync.pix→d.comb/d.sync/d.pix. | 2018-12-12 12:38:24 +00:00 |  | 
				
					
						|  whitequark | aab01d9e59 | fhdl.ast.Signal: implement attrs field. | 2018-12-12 11:30:40 +00:00 |  | 
				
					
						|  whitequark | 851ed06769 | ClockDomain.{rst→reset}, for consistency with ResetInserter. nmigen.compat.ClockDomain would alias this, for Migen compatibility. | 2018-12-12 09:49:02 +00:00 |  | 
				
					
						|  whitequark | 4d3258013d | Initial commit. | 2018-12-12 03:18:44 +00:00 |  |