whitequark
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790eb05a92
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Rename fhdl→hdl, genlib→lib.
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2018-12-15 14:25:31 +00:00 |
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whitequark
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50ba443f92
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fhdl.ast: fix Switch with constant test.
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2018-12-14 16:09:51 +00:00 |
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whitequark
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fb27c2520b
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back.pysim: new simulator backend (WIP).
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2018-12-13 18:02:46 +00:00 |
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whitequark
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72257b6935
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fhdl.ir: implement clock domain propagation.
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2018-12-13 11:01:03 +00:00 |
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whitequark
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c5087edfa5
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fhdl.cd: add tests.
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2018-12-13 09:19:16 +00:00 |
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whitequark
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9bee90f1bd
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fhdl.xfrm: implement DomainRenamer.
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2018-12-13 08:57:14 +00:00 |
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whitequark
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b1a89ef5fd
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fhdl.ir: add tests for port propagation.
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2018-12-13 08:09:39 +00:00 |
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whitequark
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a797e27573
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fhdl.dsl: add tests for lowering. 99% branch coverage.
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2018-12-13 07:33:59 +00:00 |
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whitequark
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e0a81edf4d
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fhdl.dsl: add tests for submodules.
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2018-12-13 07:24:28 +00:00 |
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whitequark
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932f1912a2
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fhdl.dsl: use less error-prone Switch/Case two-level syntax.
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2018-12-13 07:11:06 +00:00 |
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whitequark
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f70ae3bac5
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fhdl.dsl: add tests for d.comb/d.sync, If/Elif/Else.
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2018-12-13 06:06:51 +00:00 |
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