whitequark
f87c00e6c3
build.plat,lib.cdc,vendor: unify platform related diagnostics. NFC.
2019-09-24 14:14:45 +00:00
whitequark
b43d2d36e8
vendor.xilinx_spartan_3_6: explain why ASYNC_REG is used. NFC.
2019-09-24 12:22:29 +00:00
Darrell Harmon
f3a8880cb8
vendor.xilinx_7series: apply false path / max delay constraints.
2019-09-24 00:47:54 +00:00
whitequark
86f0f12b58
lib.cdc: avoid modifying synchronizers in their elaborate() method.
2019-09-23 16:42:44 +00:00
Darrell Harmon
51f03bb509
vendor.xilinx_spartan_3_6: override reset synchronizer.
2019-09-23 16:28:15 +00:00
whitequark
8deb13cea3
lib.cdc: MultiReg→FFSynchronizer.
...
Fixes #229 .
2019-09-23 14:18:45 +00:00
whitequark
07a82ed70e
build.plat: NMIGEN_<toolchain>_env→NMIGEN_ENV_<toolchain>
...
This is more consistent with other environment variables nMigen uses.
2019-09-21 12:23:53 +00:00
Darrell Harmon
af7224de5d
vendor.xilinx_{7series,spartan3_6}: specialize MultiReg.
...
Vivado/ISE would otherwise infer an SRL16 from a MultiReg in some cases.
2019-09-20 15:13:27 +00:00
whitequark
9ea3ff7ae2
build.plat: bypass tool detection if NMIGEN_*_env is set.
...
It's not practical to detect tools within the toolchain environment
for various reasons, so just assume the tools are there if the user
says they are.
Before this commit, the tools would be searched outside the toolchain
environment, which of course would always fail for Vivado, ISE, etc.
2019-09-12 21:56:48 +00:00
whitequark
8c30147e39
build.plat,vendor: allow clock constraints on arbitrary signals.
...
Currently only done for Synopsys based toolchains (i.e. not nextpnr).
Refs #88 .
2019-09-11 23:35:43 +00:00
Emily
c4e8ac734f
_toolchain,build.plat,vendor.*: add required_tools list and checks.
2019-08-31 00:05:47 +00:00
whitequark
c77274c1ad
vendor: eliminate unnecessary LUT instantiation.
...
Fixes #165 .
2019-08-22 21:29:20 +00:00
whitequark
531040d2fd
vendor: style. NFC.
2019-08-21 21:32:36 +00:00
whitequark
25b280dba1
build.plat: remove TemplatedPlatform.unix_interpreter.
...
Vendor toolchains generally require far more workarounds than this,
and we already have a perfectly fine way of overriding templates.
2019-08-21 21:02:13 +00:00
whitequark
434b686d5e
vendor.xilinx_{spartan_3_6,7series}: reconsider default reset logic.
...
On Xilinx devices, flip-flops are reset to their initial state with
an internal global reset network, but this network is deasserted
asynchronously to user clocks. Use BUFGCE and STARTUP to hold default
clock low until after GWE is deasserted.
2019-08-04 23:28:09 +00:00
whitequark
3d7214cb70
vendor.xilinx_spartan_3_6: reconsider bitgen defaults.
...
Previously changed in 27063a3b
.
I haven't realized the .bin file is the same as the .bit file without
a small header. That means generating it is free and it's just easier
to let programming tools to be able to always rely on its existence.
2019-08-04 23:28:09 +00:00
whitequark
27063a3bd3
vendor.xilinx_spartan_3_6: set bitgen defaults to -g Binary:Yes -g Compress
.
...
* `-g Binary:Yes` should be overridable.
* `-g Compress` is a good default.
2019-08-04 14:18:49 +00:00
whitequark
65da905c15
vendor.xilinx_spartan_3_6: always use -w for map/par/bitgen.
...
-w stands for "override output file", and supplying user options
should not remove it.
2019-08-04 14:12:02 +00:00
whitequark
15e8dfe532
vendor.xilinx_spartan_3_6: do not use retiming by default.
...
This was added in b404d603
, probably by mistake, and is certainly
wrong given that we do not (yet) correctly mark CDC FFs.
2019-08-04 13:48:33 +00:00
whitequark
6b025df12c
vendor.xilinx_spartan_3_6: force use of bash on UNIX.
2019-08-04 13:20:54 +00:00
whitequark
8854ca03ae
build.plat,vendor: automatically create sync domain from default_clk.
...
But only if it is not defined by the programmer.
Closes #57 .
2019-08-03 18:36:58 +00:00
N. Engelhardt
5fd8a796ae
vendor: don't emit duplicate iobuf submodule names.
...
These are no longer allowed after commit 698b005
.
2019-07-21 07:49:21 +00:00
William D. Jones
b404d603fb
vendor.xilinx_spartan_3_6: Add Spartan3A family support.
2019-07-07 20:44:48 +00:00