whitequark 706eb03e6b vendor.lattice_machxo2: add back as a compatibility shim.		2020-06-21 17:28:01 +00:00
..
__init__.py	vendor.fpga.lattice_ice40: implement.	2019-06-01 16:47:01 +00:00
intel.py	vendor.intel: don't use write_verilog -decimal.	2020-05-21 09:49:42 +00:00
lattice_ecp5.py	plat, vendor: systematically escape net and file names in Tcl.	2020-05-02 10:41:18 +00:00
lattice_ice40.py	vendor.lattice_ice40: reword confusing comment. NFC.	2020-05-31 10:21:45 +00:00
lattice_machxo2.py	vendor.lattice_machxo2: add back as a compatibility shim.	2020-06-21 17:28:01 +00:00
lattice_machxo_2_3l.py	vendor.lattice_machxo2: add back as a compatibility shim.	2020-06-21 17:28:01 +00:00
xilinx_7series.py	vendor.xilinx_{7series,ultrascale}: don't use write_verilog -decimal.	2020-05-21 08:57:43 +00:00
xilinx_spartan_3_6.py	vendor: fix typo async_ff_sync	2020-03-15 11:34:52 +00:00
xilinx_ultrascale.py	vendor.xilinx_{7series,ultrascale}: don't use write_verilog -decimal.	2020-05-21 08:57:43 +00:00