..
compat
Add support for using non-compat Elaboratable instances with compat.fhdl.verilog.convert and compat.run_simulation
2020-04-02 02:46:44 +00:00
__init__.py
test: use #nmigen:
magic comment instead of monkey patch.
2019-10-26 06:37:08 +00:00
test_build_dsl.py
build.dsl: allow strings to be used as connector numbers.
2020-01-31 03:11:34 +00:00
test_build_plat.py
build.plat: in Platform.add_file(), allow adding exact duplicates.
2019-11-15 23:40:44 +00:00
test_build_res.py
test_build_res: fix after commit 3e2ecdf2
.
2020-02-07 00:07:19 +00:00
test_compat.py
{,_}tools→{,_}utils
2019-10-13 18:53:38 +00:00
test_examples.py
{,_}tools→{,_}utils
2019-10-13 18:53:38 +00:00
test_hdl_ast.py
hdl.ast: add const-shift operations.
2020-05-20 03:18:33 +00:00
test_hdl_cd.py
{,_}tools→{,_}utils
2019-10-13 18:53:38 +00:00
test_hdl_dsl.py
hdl.dsl: check for unique domain name.
2020-05-19 23:40:49 +00:00
test_hdl_ir.py
hdl.ir: typecheck convert(ports=)
more carefully.
2020-04-24 21:15:00 +00:00
test_hdl_mem.py
hdl.mem: add synthesis attribute support.
2020-02-06 14:53:16 +00:00
test_hdl_rec.py
hdl.rec: preserve shapes when constructing a layout.
2020-06-05 03:19:46 +00:00
test_hdl_xfrm.py
hdl.rec: make Record inherit from UserValue.
2020-04-16 16:46:55 +00:00
test_lib_cdc.py
lib.cdc: extract AsyncFFSynchronizer.
2020-03-08 21:37:40 +00:00
test_lib_coding.py
back.pysim: redesign the simulator.
2019-11-28 21:05:34 +00:00
test_lib_fifo.py
Correctly handle resets in AsyncFIFO.
2020-03-14 23:26:07 +00:00
test_lib_io.py
hdl.rec: preserve shapes when constructing a layout.
2020-06-05 03:19:46 +00:00
test_sim.py
hdl.ast: add const-shift operations.
2020-05-20 03:18:33 +00:00
utils.py
{,_}tools→{,_}utils
2019-10-13 18:53:38 +00:00