amaranth/tests
Catherine 36fb9035e4 sim: allow visualizing delta cycles in VCD dumps.
This commit adds an option `fs_per_delta=` to `Simulator.write_vcd()`.
Specifying a positive integer value for it causes the simulator to
offset value change times by that many femtoseconds for each delta
cycle after the last timeline advancement.

This option is only suitable for debugging. If the timeline is advanced
by less than the combined duration of expanded delta cycles, an error
similar to the following will be raised:

    vcd.writer.VCDPhaseError: Out of order timestamp: 62490

Typically `fs_per_delta=1` is best, since it allows thousands of delta
cycles to be expanded without risking a VCD phase error, but bigger
values can be used for an exaggerated visual effect.

Also, the VCD writer is changed to use 1 fs as the timebase instead of
1 ps. This change is largely invisible to designers, resulting only in
slightly larger VCD files due to longer timestamps.

Since the `fs_per_delta=` option is per VCD writer, it is possible to
simultaneously dump two VCDs, one with and one without delta cycle
expansion:

    with sim.write_vcd("sim.vcd"), sim.write_vcd("sim.d.vcd", fs_per_delta=1):
        sim.run()
2024-03-24 12:07:49 +00:00
..
__init__.py tests: move out of the main package. 2020-08-27 00:33:31 +00:00
test_build_dsl.py Pyupgrade to 3.8+. NFCI 2023-11-14 13:07:21 +00:00
test_build_plat.py Rename nMigen to Amaranth HDL. 2021-12-10 10:34:13 +00:00
test_build_res.py Implement RFC 53: Low-level I/O primitives. 2024-03-18 20:33:22 +00:00
test_examples.py tests: move out of the main package. 2020-08-27 00:33:31 +00:00
test_hdl_ast.py Implement RFC 51: Add ShapeCastable.from_bits and amaranth.lib.data.Const. 2024-03-19 04:01:26 +00:00
test_hdl_cd.py amaranth.hdl: start all private names with an underscore. 2024-01-30 17:20:45 +00:00
test_hdl_dsl.py Implement RFC 50: Print and string formatting. 2024-03-11 09:42:43 +00:00
test_hdl_ir.py hdl._ir: Remove support for non-Elaboratable elaboratables. 2024-03-20 08:20:23 +00:00
test_hdl_mem.py Implement RFC 45: Move hdl.Memory to lib.Memory. 2024-02-19 22:24:58 +00:00
test_hdl_rec.py hdl._ast: Make AST nodes immutable. 2024-02-29 18:56:46 +00:00
test_hdl_xfrm.py hdl._xfrm: Simplify EnableInserter logic. 2024-03-03 18:38:20 +00:00
test_lib_cdc.py Implement RFC 43: Rename reset= to init=. 2024-02-15 22:52:24 +00:00
test_lib_coding.py Implement RFC 50: Print and string formatting. 2024-03-11 09:42:43 +00:00
test_lib_crc.py Implement RFC 27 amendment: deprecate add_sync_process, not add_process. 2024-02-12 18:26:48 +00:00
test_lib_data.py Implement RFC 51: Add ShapeCastable.from_bits and amaranth.lib.data.Const. 2024-03-19 04:01:26 +00:00
test_lib_enum.py Implement RFC 51: Add ShapeCastable.from_bits and amaranth.lib.data.Const. 2024-03-19 04:01:26 +00:00
test_lib_fifo.py Implement RFC 50: Print and string formatting. 2024-03-11 09:42:43 +00:00
test_lib_io.py lib.io: Implement *Buffer from RFC 55. 2024-03-22 01:44:25 +00:00
test_lib_memory.py lib.memory: Memory.{r,w}_ports.{read,write}_ports. 2024-03-22 23:05:42 +00:00
test_lib_wiring.py lib.wiring: remove unnecessary flipping in Signature.flatten. 2024-03-15 10:35:50 +00:00
test_sim.py sim: allow visualizing delta cycles in VCD dumps. 2024-03-24 12:07:49 +00:00
test_tracer.py amaranth.hdl: start all private names with an underscore. 2024-01-30 17:20:45 +00:00
test_utils.py utils: F-strings are missing the letter "f" 2024-03-13 14:56:27 +00:00
utils.py tests: stop using implicit ports. 2024-02-12 13:24:54 +00:00