whitequark 27b47faf16 hdl.ast: add Value.{as_signed,as_unsigned}. ... Before this commit, there was no way to do so besides creating and assigning an intermediate signal, which could not be extracted into a helper function due to Module statefulness. Fixes #292.		2020-02-06 18:27:55 +00:00
..
compat	test: use #nmigen: magic comment instead of monkey patch.	2019-10-26 06:37:08 +00:00
__init__.py	test: use #nmigen: magic comment instead of monkey patch.	2019-10-26 06:37:08 +00:00
test_build_dsl.py	build.dsl: allow strings to be used as connector numbers.	2020-01-31 03:11:34 +00:00
test_build_plat.py	build.plat: in Platform.add_file(), allow adding exact duplicates.	2019-11-15 23:40:44 +00:00
test_build_res.py	test: use #nmigen: magic comment instead of monkey patch.	2019-10-26 06:37:08 +00:00
test_compat.py	{,_}tools→{,_}utils	2019-10-13 18:53:38 +00:00
test_examples.py	{,_}tools→{,_}utils	2019-10-13 18:53:38 +00:00
test_hdl_ast.py	hdl.ast: add Value.{as_signed,as_unsigned}.	2020-02-06 18:27:55 +00:00
test_hdl_cd.py	{,_}tools→{,_}utils	2019-10-13 18:53:38 +00:00
test_hdl_dsl.py	hdl.dsl: make referencing undefined FSM states an error.	2020-02-06 17:47:46 +00:00
test_hdl_ir.py	hdl.ir: type check ports.	2020-02-06 17:33:41 +00:00
test_hdl_mem.py	hdl.mem: add synthesis attribute support.	2020-02-06 14:53:16 +00:00
test_hdl_rec.py	{,_}tools→{,_}utils	2019-10-13 18:53:38 +00:00
test_hdl_xfrm.py	test: use #nmigen: magic comment instead of monkey patch.	2019-10-26 06:37:08 +00:00
test_lib_cdc.py	back.pysim: redesign the simulator.	2019-11-28 21:05:34 +00:00
test_lib_coding.py	back.pysim: redesign the simulator.	2019-11-28 21:05:34 +00:00
test_lib_fifo.py	test_lib_fifo: define all referenced FSM states.	2020-02-06 18:10:15 +00:00
test_lib_io.py	{,_}tools→{,_}utils	2019-10-13 18:53:38 +00:00
test_sim.py	hdl.ast: add Value.{as_signed,as_unsigned}.	2020-02-06 18:27:55 +00:00
utils.py	{,_}tools→{,_}utils	2019-10-13 18:53:38 +00:00