whitequark 3e59d857e1 back.pysim: use bare ints for signal values (-5% runtime).		2018-12-14 03:05:57 +00:00
..
__init__.py	Initial commit.	2018-12-12 03:18:44 +00:00
ast.py	back.pysim: use bare ints for signal values (-5% runtime).	2018-12-14 03:05:57 +00:00
cd.py	fhdl.cd: rename ClockDomain signals together with domain.	2018-12-13 15:24:55 +00:00
dsl.py	fhdl: cd_name→domain.	2018-12-13 10:15:01 +00:00
ir.py	back.pysim: new simulator backend (WIP).	2018-12-13 18:02:46 +00:00
xfrm.py	fhdl.cd: rename ClockDomain signals together with domain.	2018-12-13 15:24:55 +00:00