whitequark 6cee280407 plat, vendor: systematically escape net and file names in Tcl. ... Before this commit, there was only occasional quoting of some names used in any Tcl files. (I'm not sure what I was thinking.) After this commit, any substs that may include Tcl special characters are escaped. This does not include build names (which are explicitly restricted to ASCII to avoid this problem), or attribute names (which are chosen from a predefined set). Ideally we'd use a more principled approach but Jinja2 does not support custom escaping mechanisms. Note that Vivado restricts clock names to a more restrictive set that forbids using Tcl special characters even when escaped. Fixes #375.		2020-05-02 10:41:18 +00:00
..
__init__.py	vendor.fpga.lattice_ice40: implement.	2019-06-01 16:47:01 +00:00
intel.py	plat, vendor: systematically escape net and file names in Tcl.	2020-05-02 10:41:18 +00:00
lattice_ecp5.py	plat, vendor: systematically escape net and file names in Tcl.	2020-05-02 10:41:18 +00:00
lattice_ice40.py	plat, vendor: systematically escape net and file names in Tcl.	2020-05-02 10:41:18 +00:00
lattice_machxo2.py	plat, vendor: systematically escape net and file names in Tcl.	2020-05-02 10:41:18 +00:00
xilinx_7series.py	plat, vendor: systematically escape net and file names in Tcl.	2020-05-02 10:41:18 +00:00
xilinx_spartan_3_6.py	vendor: fix typo async_ff_sync	2020-03-15 11:34:52 +00:00
xilinx_ultrascale.py	plat, vendor: systematically escape net and file names in Tcl.	2020-05-02 10:41:18 +00:00