.. |
compat
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compat: suppress deprecation warnings that are internal or during test.
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2019-01-26 15:43:00 +00:00 |
__init__.py
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hdl.ir: detect elaboratables that are created but not used.
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2019-04-21 08:52:57 +00:00 |
test_build_dsl.py
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build.dsl: add support for connectors.
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2019-06-03 13:47:00 +00:00 |
test_build_res.py
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vendor.fpga.lattice_ice40: implement differential input buffers.
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2019-06-03 08:38:12 +00:00 |
test_hdl_ast.py
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hdl.ast: improve tests for exceptional conditions.
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2019-04-21 07:20:00 +00:00 |
test_hdl_cd.py
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hdl.mem: add tests for all error conditions.
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2018-12-21 06:07:16 +00:00 |
test_hdl_dsl.py
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hdl.dsl: allow adding submodules with computed name, like with domains.
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2019-06-03 02:22:55 +00:00 |
test_hdl_ir.py
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hdl.ir: accept LHS signals like slices as Instance io ports.
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2019-06-03 02:39:14 +00:00 |
test_hdl_mem.py
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hdl.mem: add DummyPort, for testing and verification.
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2019-01-01 03:08:10 +00:00 |
test_hdl_rec.py
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hdl.rec: unbreak hasattr(rec, ...).
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2019-06-03 07:43:31 +00:00 |
test_hdl_xfrm.py
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hdl.ir: detect elaboratables that are created but not used.
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2019-04-21 08:52:57 +00:00 |
test_lib_cdc.py
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lib.cdc: add ResetSynchronizer.
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2019-01-26 18:07:59 +00:00 |
test_lib_coding.py
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hdl.ir: detect elaboratables that are created but not used.
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2019-04-21 08:52:57 +00:00 |
test_lib_fifo.py
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hdl.ir: detect elaboratables that are created but not used.
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2019-04-21 08:52:57 +00:00 |
test_lib_io.py
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lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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2019-06-03 07:43:31 +00:00 |
test_sim.py
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test_sim: add missing add_process().
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2019-03-28 17:50:14 +00:00 |
tools.py
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hdl.ir: rename .get_fragment() to .elaborate().
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2019-01-26 02:31:12 +00:00 |