amaranth/nmigen
whitequark d0ac8bf789 back.rtlil: actually match shape of left hand side.
This comes up in code such as:
  Array([Signal(1), Signal(8)]).eq(Const(0, 8))
2019-08-03 23:48:28 +00:00
..
back back.rtlil: actually match shape of left hand side. 2019-08-03 23:48:28 +00:00
build build.run: use keyword-only arguments where appropriate. 2019-08-03 22:52:58 +00:00
compat compat.fhdl.specials: track changes in build.plat. 2019-08-03 22:52:34 +00:00
hdl hdl.dsl: reword m.If(~True) warning to be more clear. 2019-08-03 18:52:24 +00:00
lib lib.fifo: fix typo. 2019-07-15 14:12:33 +00:00
test hdl.dsl: reword m.If(~True) warning to be more clear. 2019-08-03 18:52:24 +00:00
vendor vendor.lattice_ice40: add missing signal indexing. 2019-08-03 22:59:33 +00:00
__init__.py Clean up imports. 2019-06-04 08:18:50 +00:00
_version.py Add versioneer. 2019-05-26 11:20:13 +00:00
cli.py hdl.ir: rename .get_fragment() to .elaborate(). 2019-01-26 02:31:12 +00:00
formal.py Clean up imports. 2019-06-04 08:18:50 +00:00
tools.py hdl: make all public Value classes other than Record final. 2019-05-12 05:40:17 +00:00
tracer.py tracer: add PyPy support to get_var_name(). 2019-07-09 07:29:01 +00:00