amaranth/nmigen/fhdl
2018-12-13 06:06:51 +00:00
..
__init__.py Initial commit. 2018-12-12 03:18:44 +00:00
ast.py fhdl.dsl: add tests for d.comb/d.sync, If/Elif/Else. 2018-12-13 06:06:51 +00:00
cd.py ClockDomain.{rst→reset}, for consistency with ResetInserter. 2018-12-12 09:49:02 +00:00
dsl.py fhdl.dsl: add tests for d.comb/d.sync, If/Elif/Else. 2018-12-13 06:06:51 +00:00
ir.py fhdl.ir: explain how port enumeration works. 2018-12-13 03:31:13 +00:00
xfrm.py fhdl.ast.Signal: implement reset_less signals. 2018-12-12 10:11:16 +00:00