amaranth/nmigen/test
2020-04-16 16:46:55 +00:00
..
compat Add support for using non-compat Elaboratable instances with compat.fhdl.verilog.convert and compat.run_simulation 2020-04-02 02:46:44 +00:00
__init__.py test: use #nmigen: magic comment instead of monkey patch. 2019-10-26 06:37:08 +00:00
test_build_dsl.py build.dsl: allow strings to be used as connector numbers. 2020-01-31 03:11:34 +00:00
test_build_plat.py build.plat: in Platform.add_file(), allow adding exact duplicates. 2019-11-15 23:40:44 +00:00
test_build_res.py test_build_res: fix after commit 3e2ecdf2. 2020-02-07 00:07:19 +00:00
test_compat.py {,_}tools→{,_}utils 2019-10-13 18:53:38 +00:00
test_examples.py {,_}tools→{,_}utils 2019-10-13 18:53:38 +00:00
test_hdl_ast.py hdl.rec: make Record inherit from UserValue. 2020-04-16 16:46:55 +00:00
test_hdl_cd.py {,_}tools→{,_}utils 2019-10-13 18:53:38 +00:00
test_hdl_dsl.py hdl.dsl: make referencing undefined FSM states an error. 2020-02-06 17:47:46 +00:00
test_hdl_ir.py hdl.ir: type check ports. 2020-02-06 17:33:41 +00:00
test_hdl_mem.py hdl.mem: add synthesis attribute support. 2020-02-06 14:53:16 +00:00
test_hdl_rec.py hdl.rec: improve repr() for Layout. 2020-04-12 04:47:40 +00:00
test_hdl_xfrm.py hdl.rec: make Record inherit from UserValue. 2020-04-16 16:46:55 +00:00
test_lib_cdc.py lib.cdc: extract AsyncFFSynchronizer. 2020-03-08 21:37:40 +00:00
test_lib_coding.py back.pysim: redesign the simulator. 2019-11-28 21:05:34 +00:00
test_lib_fifo.py Correctly handle resets in AsyncFIFO. 2020-03-14 23:26:07 +00:00
test_lib_io.py {,_}tools→{,_}utils 2019-10-13 18:53:38 +00:00
test_sim.py hdl.ast: add Value.{rotate_left,rotate_right}. 2020-04-13 13:40:39 +00:00
utils.py {,_}tools→{,_}utils 2019-10-13 18:53:38 +00:00