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amaranth/tests/test_lib_io.py

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tests: move out of the main package. Compared to tests in the repository root, tests in the package have many downsides: * Unless explicitly excluded in find_packages(), tests and their support code effectively become a part of public API. This, unfortunately, happened with FHDLTestCase, which was never intended for downstream use. * Even if explicitly excluded from the setuptools package, using an editable install, or setting PYTHONPATH still allows accessing the tests. * Having a sub-package that is present in the source tree but not exported (or, worse, exported only sometimes) is confusing. * The name `nmigen.test` cannot be used for anything else, such as testing utilities that *are* intended for downstream use.
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from nmigen.hdl import *
from nmigen.hdl.rec import *
sim: split into base, core, and engines. Before this commit, each simulation engine (which is only pysim at the moment, but also cxxsim soon) was a subclass of SimulatorCore, and every simulation engine module would essentially duplicate the complete structure of a simulator, with code partially shared. This was a really bad idea: it was inconvenient to use, with downstream code having to branch between e.g. PySettle and CxxSettle; it had no well-defined external interface; it had multiple virtually identical entry points; and it had no separation between simulation algorithms and glue code. This commit completely rearranges simulation code. 1. sim._base defines internal simulation interfaces. The clarity of these internal interfaces is important because simulation engines mix and match components to provide a consistent API regardless of the chosen engine. 2. sim.core defines the external simulation interface: the commands and the simulator facade. The facade provides a single entry point and, when possible, validates or lowers user input. It also imports built-in simulation engines by their symbolic name, avoiding eager imports of pyvcd or ctypes. 3. sim.xxxsim (currently, only sim.pysim) defines the simulator implementation: time and state management, process scheduling, and waveform dumping. The new simulator structure has none of the downsides of the old one. See #324.
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from nmigen.sim import *
tests: move out of the main package. Compared to tests in the repository root, tests in the package have many downsides: * Unless explicitly excluded in find_packages(), tests and their support code effectively become a part of public API. This, unfortunately, happened with FHDLTestCase, which was never intended for downstream use. * Even if explicitly excluded from the setuptools package, using an editable install, or setting PYTHONPATH still allows accessing the tests. * Having a sub-package that is present in the source tree but not exported (or, worse, exported only sometimes) is confusing. * The name `nmigen.test` cannot be used for anything else, such as testing utilities that *are* intended for downstream use.
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from nmigen.lib.io import *
{,_}tools→{,_}utils In context of nMigen, "tools" means "parts of toolchain", so it is confusing to have a completely unrelated module also called "tools".
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from .utils import *
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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class PinLayoutTestCase(FHDLTestCase):
def assertLayoutEqual(self, layout, expected):
casted_layout = {}
for name, (shape, dir) in layout.items():
casted_layout[name] = (Shape.cast(shape), dir)
self.assertEqual(casted_layout, expected)
class PinLayoutCombTestCase(PinLayoutTestCase):
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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def test_pin_layout_i(self):
layout_1 = pin_layout(1, dir="i")
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"i": ((1, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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})
layout_2 = pin_layout(2, dir="i")
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"i": ((2, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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})
def test_pin_layout_o(self):
layout_1 = pin_layout(1, dir="o")
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"o": ((1, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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})
layout_2 = pin_layout(2, dir="o")
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"o": ((2, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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})
lib.io: allow dir="oe". Although a dir="oe" pin is generally equivalent to dir="io" pin with the i* signal(s) disconnected, they are not equivalent, because some pins may not be able to support input buffers at all, either because there are no input buffers, or because the input buffers are consumed by some other resource. E.g. this can happen on iCE40 when the input buffer is consumed by a PLL.
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def test_pin_layout_oe(self):
layout_1 = pin_layout(1, dir="oe")
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
lib.io: allow dir="oe". Although a dir="oe" pin is generally equivalent to dir="io" pin with the i* signal(s) disconnected, they are not equivalent, because some pins may not be able to support input buffers at all, either because there are no input buffers, or because the input buffers are consumed by some other resource. E.g. this can happen on iCE40 when the input buffer is consumed by a PLL.
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"o": ((1, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
})
layout_2 = pin_layout(2, dir="oe")
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
lib.io: allow dir="oe". Although a dir="oe" pin is generally equivalent to dir="io" pin with the i* signal(s) disconnected, they are not equivalent, because some pins may not be able to support input buffers at all, either because there are no input buffers, or because the input buffers are consumed by some other resource. E.g. this can happen on iCE40 when the input buffer is consumed by a PLL.
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"o": ((2, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
})
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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def test_pin_layout_io(self):
layout_1 = pin_layout(1, dir="io")
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"i": ((1, False), DIR_NONE),
"o": ((1, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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})
layout_2 = pin_layout(2, dir="io")
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"i": ((2, False), DIR_NONE),
"o": ((2, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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})
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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class PinLayoutSDRTestCase(PinLayoutTestCase):
lib.io: allow Pin(xdr=0), representing a combinatorial I/O buffer.
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def test_pin_layout_i(self):
layout_1 = pin_layout(1, dir="i", xdr=1)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"i_clk": ((1, False), DIR_NONE),
lib.io: allow Pin(xdr=0), representing a combinatorial I/O buffer.
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"i": ((1, False), DIR_NONE),
})
layout_2 = pin_layout(2, dir="i", xdr=1)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"i_clk": ((1, False), DIR_NONE),
lib.io: allow Pin(xdr=0), representing a combinatorial I/O buffer.
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"i": ((2, False), DIR_NONE),
})
def test_pin_layout_o(self):
layout_1 = pin_layout(1, dir="o", xdr=1)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"o_clk": ((1, False), DIR_NONE),
lib.io: allow Pin(xdr=0), representing a combinatorial I/O buffer.
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"o": ((1, False), DIR_NONE),
})
layout_2 = pin_layout(2, dir="o", xdr=1)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"o_clk": ((1, False), DIR_NONE),
lib.io: allow Pin(xdr=0), representing a combinatorial I/O buffer.
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"o": ((2, False), DIR_NONE),
})
lib.io: allow dir="oe". Although a dir="oe" pin is generally equivalent to dir="io" pin with the i* signal(s) disconnected, they are not equivalent, because some pins may not be able to support input buffers at all, either because there are no input buffers, or because the input buffers are consumed by some other resource. E.g. this can happen on iCE40 when the input buffer is consumed by a PLL.
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def test_pin_layout_oe(self):
layout_1 = pin_layout(1, dir="oe", xdr=1)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"o_clk": ((1, False), DIR_NONE),
lib.io: allow dir="oe". Although a dir="oe" pin is generally equivalent to dir="io" pin with the i* signal(s) disconnected, they are not equivalent, because some pins may not be able to support input buffers at all, either because there are no input buffers, or because the input buffers are consumed by some other resource. E.g. this can happen on iCE40 when the input buffer is consumed by a PLL.
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"o": ((1, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
})
layout_2 = pin_layout(2, dir="oe", xdr=1)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"o_clk": ((1, False), DIR_NONE),
lib.io: allow dir="oe". Although a dir="oe" pin is generally equivalent to dir="io" pin with the i* signal(s) disconnected, they are not equivalent, because some pins may not be able to support input buffers at all, either because there are no input buffers, or because the input buffers are consumed by some other resource. E.g. this can happen on iCE40 when the input buffer is consumed by a PLL.
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"o": ((2, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
})
lib.io: allow Pin(xdr=0), representing a combinatorial I/O buffer.
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def test_pin_layout_io(self):
layout_1 = pin_layout(1, dir="io", xdr=1)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"i_clk": ((1, False), DIR_NONE),
lib.io: allow Pin(xdr=0), representing a combinatorial I/O buffer.
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"i": ((1, False), DIR_NONE),
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"o_clk": ((1, False), DIR_NONE),
lib.io: allow Pin(xdr=0), representing a combinatorial I/O buffer.
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"o": ((1, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
})
layout_2 = pin_layout(2, dir="io", xdr=1)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"i_clk": ((1, False), DIR_NONE),
lib.io: allow Pin(xdr=0), representing a combinatorial I/O buffer.
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"i": ((2, False), DIR_NONE),
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"o_clk": ((1, False), DIR_NONE),
lib.io: allow Pin(xdr=0), representing a combinatorial I/O buffer.
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"o": ((2, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
})
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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class PinLayoutDDRTestCase(PinLayoutTestCase):
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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def test_pin_layout_i(self):
layout_1 = pin_layout(1, dir="i", xdr=2)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"i_clk": ((1, False), DIR_NONE),
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"i0": ((1, False), DIR_NONE),
"i1": ((1, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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})
layout_2 = pin_layout(2, dir="i", xdr=2)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"i_clk": ((1, False), DIR_NONE),
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"i0": ((2, False), DIR_NONE),
"i1": ((2, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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})
def test_pin_layout_o(self):
layout_1 = pin_layout(1, dir="o", xdr=2)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"o_clk": ((1, False), DIR_NONE),
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"o0": ((1, False), DIR_NONE),
"o1": ((1, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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})
layout_2 = pin_layout(2, dir="o", xdr=2)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"o_clk": ((1, False), DIR_NONE),
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"o0": ((2, False), DIR_NONE),
"o1": ((2, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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})
lib.io: allow dir="oe". Although a dir="oe" pin is generally equivalent to dir="io" pin with the i* signal(s) disconnected, they are not equivalent, because some pins may not be able to support input buffers at all, either because there are no input buffers, or because the input buffers are consumed by some other resource. E.g. this can happen on iCE40 when the input buffer is consumed by a PLL.
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def test_pin_layout_oe(self):
layout_1 = pin_layout(1, dir="oe", xdr=2)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"o_clk": ((1, False), DIR_NONE),
lib.io: allow dir="oe". Although a dir="oe" pin is generally equivalent to dir="io" pin with the i* signal(s) disconnected, they are not equivalent, because some pins may not be able to support input buffers at all, either because there are no input buffers, or because the input buffers are consumed by some other resource. E.g. this can happen on iCE40 when the input buffer is consumed by a PLL.
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"o0": ((1, False), DIR_NONE),
"o1": ((1, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
})
layout_2 = pin_layout(2, dir="oe", xdr=2)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"o_clk": ((1, False), DIR_NONE),
lib.io: allow dir="oe". Although a dir="oe" pin is generally equivalent to dir="io" pin with the i* signal(s) disconnected, they are not equivalent, because some pins may not be able to support input buffers at all, either because there are no input buffers, or because the input buffers are consumed by some other resource. E.g. this can happen on iCE40 when the input buffer is consumed by a PLL.
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"o0": ((2, False), DIR_NONE),
"o1": ((2, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
})
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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def test_pin_layout_io(self):
layout_1 = pin_layout(1, dir="io", xdr=2)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_1.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"i_clk": ((1, False), DIR_NONE),
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"i0": ((1, False), DIR_NONE),
"i1": ((1, False), DIR_NONE),
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"o_clk": ((1, False), DIR_NONE),
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
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"o0": ((1, False), DIR_NONE),
"o1": ((1, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
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})
layout_2 = pin_layout(2, dir="io", xdr=2)
hdl.rec: preserve shapes when constructing a layout. Preserve the original user-provided shape, while still checking its validity. This allows Enum decoders to work when specifying record fields with Enums. Fixes #393.
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self.assertLayoutEqual(layout_2.fields, {
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
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"i_clk": ((1, False), DIR_NONE),
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
2019-05-25 15:57:07 -06:00
"i0": ((2, False), DIR_NONE),
"i1": ((2, False), DIR_NONE),
lib.io: add i_clk and o_clk to pin layout with xdr>=1.
2019-06-02 23:56:18 -06:00
"o_clk": ((1, False), DIR_NONE),
hdl.rec: allow providing fields during construction. This allows creating records populated with e.g. signals with custom names, or sub-records that are instances of Record subclasses.
2019-05-25 15:57:07 -06:00
"o0": ((2, False), DIR_NONE),
"o1": ((2, False), DIR_NONE),
"oe": ((1, False), DIR_NONE),
lib.io: rework TSTriple/Tristate interface to use pin_layout/Pin.
2019-04-15 10:27:23 -06:00
})
class PinTestCase(FHDLTestCase):
def test_attributes(self):
pin = Pin(2, dir="io", xdr=2)
self.assertEqual(pin.width, 2)
self.assertEqual(pin.dir, "io")
self.assertEqual(pin.xdr, 2)
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