whitequark
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db5fd1e4c4
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compat.fhdl.structure: only convert to bool in If/Elif if necessary.
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2018-12-16 17:41:42 +00:00 |
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whitequark
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286a8009c8
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compat.fhdl: reexport Array.
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2018-12-16 10:39:54 +00:00 |
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whitequark
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790eb05a92
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Rename fhdl→hdl, genlib→lib.
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2018-12-15 14:25:31 +00:00 |
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whitequark
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9010805040
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compat.fhdl.structure: handle If/Elif with multi-bit condition.
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2018-12-15 00:10:54 +00:00 |
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whitequark
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ecea721f43
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compat.fhdl.module: allow adding native submodules to compat modules.
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2018-12-14 23:56:50 +00:00 |
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whitequark
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1c7b43ea49
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Fix deprecations in Python 3.7.
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2018-12-14 23:56:50 +00:00 |
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whitequark
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e230383aac
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back.pysim: make initial phase configurable.
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2018-12-14 16:46:16 +00:00 |
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whitequark
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0ef5ced492
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compat.sim: match clock period.
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2018-12-14 16:39:52 +00:00 |
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whitequark
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17d26c8329
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compat: add run_simulation shim.
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2018-12-14 16:22:18 +00:00 |
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whitequark
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3bc3647380
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compat.fhdl.module: fix specials.
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2018-12-14 16:14:08 +00:00 |
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whitequark
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3b23645fb7
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compat: add fhdl.specials.TSTriple shim.
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2018-12-14 16:09:51 +00:00 |
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whitequark
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a0d555a9fc
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compat: add genlib.cdc.MultiReg shim.
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2018-12-14 16:01:38 +00:00 |
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whitequark
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baba47251c
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compat.fhdl.module: update deprecation messages.
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2018-12-14 16:01:38 +00:00 |
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whitequark
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b58715c5dc
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ast, back.pysim: allow specifying user-defined decoders for signals.
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2018-12-14 09:02:29 +00:00 |
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whitequark
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6251c95d4e
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compat.genlib.fsm: import/wrap Migen code.
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2018-12-13 12:41:19 +00:00 |
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whitequark
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f4340c19bb
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fhdl: cd_name→domain.
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2018-12-13 10:15:01 +00:00 |
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whitequark
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22c76e5f90
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compat.fhdl.module: implement finalization.
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2018-12-13 02:36:15 +00:00 |
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whitequark
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f0f4c0ce61
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fhdl.ast: bits_sign→shape.
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2018-12-13 02:06:58 +00:00 |
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whitequark
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b4dab74b2e
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compat.fhdl.{module,structure}: import/wrap Migen code (WIP).
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2018-12-12 15:47:34 +00:00 |
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whitequark
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356852a570
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compat.fhdl.bitcontainer: import/wrap Migen code.
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2018-12-12 15:22:34 +00:00 |
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