amaranth/nmigen
whitequark 378e924280 hdl.ast: rename nbits to width.
Also, replace `bits, sign = x.shape()` with more idiomatic
`width, signed = x.shape()`.

This unifies all properties corresponding to `len(x)` to `x.width`.
(Not all values have a `width` property.)

Fixes #210.
2019-09-20 15:36:25 +00:00
..
back hdl.ast: rename nbits to width. 2019-09-20 15:36:25 +00:00
build build.plat: bypass tool detection if NMIGEN_*_env is set. 2019-09-12 21:56:48 +00:00
compat lib.cdc: make domain properties private. 2019-09-12 13:54:48 +00:00
hdl hdl.ast: rename nbits to width. 2019-09-20 15:36:25 +00:00
lib lib.fifo: adjust for new CDC primitive conventions. 2019-09-13 12:36:51 +00:00
test hdl.ast: rename nbits to width. 2019-09-20 15:36:25 +00:00
vendor vendor.xilinx_{7series,spartan3_6}: specialize MultiReg. 2019-09-20 15:13:27 +00:00
__init__.py Remove nmigen.lib from prelude. 2019-09-06 06:53:06 +00:00
_toolchain.py _toolchain,build.plat,vendor.*: add required_tools list and checks. 2019-08-31 00:05:47 +00:00
asserts.py hdl.ast,back.rtlil: implement Cover. 2019-09-03 01:32:24 +00:00
cli.py hdl.ir: rename .get_fragment() to .elaborate(). 2019-01-26 02:31:12 +00:00
tools.py hdl: make all public Value classes other than Record final. 2019-05-12 05:40:17 +00:00
tracer.py tracer: fix typo. 2019-08-19 20:20:18 +00:00