Darrell Harmon af7224de5d vendor.xilinx_{7series,spartan3_6}: specialize MultiReg. ... Vivado/ISE would otherwise infer an SRL16 from a MultiReg in some cases.		2019-09-20 15:13:27 +00:00
..
__init__.py	vendor.fpga.lattice_ice40: implement.	2019-06-01 16:47:01 +00:00
lattice_ecp5.py	build.plat: bypass tool detection if NMIGEN_*_env is set.	2019-09-12 21:56:48 +00:00
lattice_ice40.py	_toolchain,build.plat,vendor.*: add required_tools list and checks.	2019-08-31 00:05:47 +00:00
xilinx_7series.py	vendor.xilinx_{7series,spartan3_6}: specialize MultiReg.	2019-09-20 15:13:27 +00:00
xilinx_spartan_3_6.py	vendor.xilinx_{7series,spartan3_6}: specialize MultiReg.	2019-09-20 15:13:27 +00:00