whitequark bfd4538df0 xilinx_7series: add grade platform property. ... For some devices grade has to be omitted, so it is optional.		2019-10-10 16:33:00 +00:00
..
__init__.py	vendor.fpga.lattice_ice40: implement.	2019-06-01 16:47:01 +00:00
intel.py	vendor.intel: add Quartus support.	2019-10-10 00:35:13 +00:00
lattice_ecp5.py	vendor.lattice_machxo2: new supported family.	2019-10-10 16:22:29 +00:00
lattice_ice40.py	vendor: yosys is a required tool for all Verilog-based flows.	2019-10-10 14:38:09 +00:00
lattice_machxo2.py	vendor.lattice_machxo2: new supported family.	2019-10-10 16:22:29 +00:00
xilinx_7series.py	xilinx_7series: add grade platform property.	2019-10-10 16:33:00 +00:00
xilinx_spartan_3_6.py	vendor: yosys is a required tool for all Verilog-based flows.	2019-10-10 14:38:09 +00:00