whitequark
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932f1912a2
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fhdl.dsl: use less error-prone Switch/Case two-level syntax.
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2018-12-13 07:11:06 +00:00 |
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whitequark
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ad9b45adcd
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fhdl.ir: fix port threading code.
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2018-12-12 13:00:50 +00:00 |
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whitequark
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0fac1f8d0f
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fhdl.dsl: comb/sync/sync.pix→d.comb/d.sync/d.pix.
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2018-12-12 12:38:24 +00:00 |
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whitequark
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bc60631d68
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genlib.cdc.MultiReg: pull in from Migen.
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2018-12-12 10:12:35 +00:00 |
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whitequark
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851ed06769
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ClockDomain.{rst→reset}, for consistency with ResetInserter.
nmigen.compat.ClockDomain would alias this, for Migen compatibility.
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2018-12-12 09:49:02 +00:00 |
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whitequark
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4d3258013d
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Initial commit.
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2018-12-12 03:18:44 +00:00 |
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