Commit graph

243 commits

Author SHA1 Message Date
Wanda
6ad0d21cc9 Implement RFC 37: Make `Signature` immutable.
Fixes #995.
2023-12-11 19:01:32 +00:00
Catherine
b9c2404f22 lib.wiring: make values of In and Out be strings "In" and "Out".
Their `str()` and `repr()` values are already that; and the 0 and 1
don't make sense. The RFC leaves it unspecified.
2023-12-11 18:04:37 +00:00
Wanda
e9545efb22 Implement RFC 35: Add ShapeLike, ValueLike. 2023-12-09 13:57:30 +00:00
Wanda
422ba9ea51 lib.wiring: use tracer to obtain default Signature path and src_loc.
Fixes #987.
2023-12-07 21:50:34 +00:00
Catherine
120375dabe lib.wiring: fix __repr__ for PureInterface subclasses.
Fixes #988.
2023-12-05 04:46:11 +00:00
Wanda
0cdcab0fbb Implement RFC 34: Rename amaranth.lib.wiring.Interface to PureInterface. 2023-12-04 21:41:47 +00:00
Wanda
ab6503e352 lib.wiring: add __repr__ to Interface. 2023-12-03 02:00:20 +00:00
Wanda
ef5cfa72bc Implement RFC 31: Enumeration type safety. 2023-11-29 10:50:34 +00:00
Wanda
c6000b1097 lib.data: implement equality for View, reject all other operators. 2023-11-27 21:44:52 +00:00
Catherine
04f906965a lib.wiring: in is_compliant(sig, obj), check that obj is an interface object with that signature.
Fixes #935.
2023-11-27 18:50:41 +00:00
Catherine
8b48af6de8 lib.wiring: make sig.members += actually work. 2023-11-27 15:42:24 +00:00
Catherine
a2e87b370e lib.wiring: fix typo in Signature.flatten. 2023-11-27 15:42:24 +00:00
Wanda
57748a66a6 lib.io: fix Pin.eq to work when FlippedInterface is involved.
This was broken by #915, when platform started handing out
`FlippedInterface` versions of `Pin`.
2023-11-27 06:35:55 +00:00
Catherine
74e613b49d lib.wiring: expand flipped object forwarding to respect @property and del.
Although `@property` is the most common case, any descriptors are now
properly supported.

The special casing of methods goes away as they work by having functions
implement the descriptor protocol. (`__get__` has some special behavior
to make this possible.)

This is some of the most cursed code I have ever written, yet it is
obviously necessary.
2023-11-26 12:53:59 +00:00
Catherine
79adbed313 sim.pysim: move name extractor functionality to Fragment.
At the moment there are two issues with assignment of names in pysim:
1. Names are not deduplicated. It is possible (and frequent) for names
   to be included twice in VCD output.
2. Names are different compared to what is emitted in RTLIL, Verilog,
   or CXXRTL output.

This commit fixes issue (1), and issue (2) will be fixed by the new IR.
2023-11-25 06:26:36 +00:00
Catherine
28e1d2833f test_lib_fifo: eliminate uses of deprecated Past and Rose. 2023-11-25 01:22:32 +00:00
William D. Jones
abd74ead55 lib.wiring: flip sub-interfaces accessed via FlippedInterface. 2023-11-22 03:07:41 +00:00
Catherine
f9da3c0d16 Pyupgrade to 3.8+. NFCI 2023-11-14 13:07:21 +00:00
Vegard Storheil Eriksen
879601380d ast: allow overriding Value operators. 2023-10-30 20:17:51 +00:00
Wanda
1c3227d956 lib.enum: use plain EnumMeta as metaclass when shape not used. 2023-10-25 17:00:24 +00:00
Wanda
4e4085a95b Implement RFC 20: Deprecate non-FWFT FIFOs.
Tracking issue #875.
2023-10-24 20:49:51 +00:00
Wanda
a60b9960c5 lib.fifo: reimplement SyncFIFOBuffered without inner SyncFIFO. 2023-10-24 20:49:51 +00:00
Wanda
e53d78474f test_lib_wiring: squash UnusedElaboratable warnings. 2023-10-24 20:18:16 +00:00
Wanda
00699f7c41 lib.enum: allow using functional syntax for enum creation.
Fixes #910.
2023-10-21 05:46:12 +00:00
Vegard Storheil Eriksen
392ead8d00 lib.data: return View from .const() 2023-10-10 09:59:37 +00:00
Wanda
470477a88f lib.wiring: fix Component.signature on subclasses without annotations.
On Python <3.10, classes without annotations do not get an
`__annotations__` member at all, so the `getattr` on a subclass falls
back to the parent class `__annotations__`, attempting to create
signature members twice.  Fix that by looking at the `__dict__` instead.
2023-10-08 22:49:47 +00:00
Wanda
ccf7aaf00d sim._pyrtl: fix masking for bitwise operands and muxes.
Fixes #926.
2023-10-05 12:26:47 +00:00
Wanda
c9416674d1 hdl.mem: fix transparent read handling for simple write ports.
Fixes #922.
2023-10-03 09:39:32 +00:00
Catherine
a90bc7b91a lib.wiring: create flipped interface from flipped signature.
Fixes #914.

Co-authored-by: Nelson Gauthier <nelson.gauthier@gmail.com>
2023-09-27 11:17:29 +00:00
Wanda
05cb82b8fc ast: fix const-castable expression handling in Signal(reset=).
The code to accept const-castable expressions was previously added in
0c4fda92fe, but it was untested and had
a few bugs.

Fixes #911.
2023-09-24 02:46:43 +00:00
Catherine
4e078322a0 lib.io: make Pin an interface object.
Tracking #879.

The directions of signals in `Pin` make it convenient to use a pin
signature in a component, such as in:

    class LEDDriver(Component):
        pins: Out(Signature({"o": Out(1)}))

    led_driver = LEDDriver()
    connect(led_driver.pins, platform.request("led"))

The `platform.request` call, correspondingly, returns a flipped `Pin`
object.
2023-09-04 20:48:36 +00:00
Catherine
87fbcedecf lib.wiring: implement Signature.flatten. 2023-09-04 19:05:49 +00:00
Catherine
f135226a79 hdl: disallow signed(0) values with unclear semantics.
Fixes #807.
2023-09-03 04:37:59 +00:00
Catherine
21b5451036 ast: ensure Part offset is unsigned.
Co-authored-by: Marcelina Kościelnicka <mwk@0x04.net>
2023-09-03 04:25:08 +00:00
Marcelina Kościelnicka
8c4a15ab92 hdl.mem: lower Memory directly to $mem_v2 RTLIL cell.
The design decision of using split memory ports in the internal
representation (copied from Yosys) was misguided and caused no end
of misery. Remove any uses of `$memrd`/`$memwr` and lower memories
directly to a combined memory cell, currently the RTLIL one.
2023-09-03 03:27:51 +00:00
Catherine
f28b20fc84 lib.wiring: ensure flipped(flipped(intf)) is intf. 2023-09-01 05:42:04 +00:00
Catherine
5a17f94fdc hdl.rec: deprecate in favor of lib.data and lib.wiring.
Tracking #879.
2023-09-01 04:20:16 +00:00
Catherine
cd4ea96bd1 Implement RFC 19: Remove amaranth.lib.scheduler 2023-09-01 00:56:12 +00:00
Catherine
44d5fac01c lib.wiring: fix equality of FlippedSignature with other object.
Fixes #882.
2023-08-31 19:26:07 +00:00
Catherine
f95fe45186 Implement RFC 22: Add ValueCastable.shape().
Fixes #794.
Closes #876.
2023-08-23 10:48:48 +00:00
Catherine
4ffadff20d lib.wiring: implement amaranth-lang/rfcs#2.
Co-authored-by: Charlotte <charlotte@lottia.net>
2023-08-22 16:22:09 +00:00
Marcelina Kościelnicka
f6c38061ff lib.data: fix Layout.const masking for signed fields.
Fixes #846.
2023-07-22 00:35:42 +00:00
Catherine
d1ca9c46a5 lib.data: allow Const as value of Layout.const(...) field.
Fixes #838.
2023-07-18 14:35:57 +00:00
Catherine
385b10d743 lib.data: improve diagnostics for field access on array layout view.
Fixes #837.
2023-07-18 14:35:49 +00:00
Charlotte
7e438180e0 lib.enum: allow empty enums. 2023-07-04 10:28:22 +00:00
Adam Greig
45b9730786 Implement RFC 6: CRC Generator
See amaranth-lang/rfcs#6 and #681.
2023-06-29 02:42:47 +00:00
Charlotte
fd4e25df42 test_sim: failing test case. 2023-06-29 01:28:44 +00:00
Catherine
b77e33f16a Drop support for Python 3.7. 2023-06-28 14:50:30 +00:00
Charlotte
59a83cf7eb test_sim: add failing test case for bitwise binary ops.
See https://github.com/amaranth-lang/amaranth/pull/826#event-9609577585.
2023-06-24 06:34:48 +00:00
Charlotte
4ec9cbbffe sim._pyrtl: py3.12+: convert to int before bitwise negating.
Amaranth bitwise negation `~` compiles to Python bitwise negation `~` in
simulation; the same holds for comparison operators such as `==`. Thus
an expression such as `~(a == b)` in simulation will compile to Python
that takes the bitwise negation of the comparison result, which will be
an actual bool.

On 3.12, the result is a `DeprecationWarning` emitted only at simulation
run-time.

When negating in simulation, coerce the value to an int. `mask` is
sufficient as we do no further arithmetic here.
2023-06-22 17:37:30 +00:00