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Author SHA1 Message Date
Catherine a0750b89c6 Release version 0.5. 2024-06-14 19:41:03 +00:00
Wanda 3d2cd15435 sim: awaken all processes waiting on changed() at time 0. 2024-06-14 19:25:47 +00:00
Catherine f3bcdf4782 docs/changes: add RFC 42. 2024-06-14 18:51:38 +00:00
Catherine 64809bea99 docs/changes: reorder migration checklist by importance. 2024-06-14 18:51:38 +00:00
Catherine 2c0265d827 Implement RFC 61: Minimal streams. 2024-06-14 18:51:38 +00:00
Catherine 3c64c66b5c _utils: remove unused extend decorator. 
This decorator was only used in the (removed) compat layer.
 2024-06-14 18:51:38 +00:00
Wanda f5a8c07d54 sim: raise an exception on add_clock conflict with comb driver. 2024-06-14 17:47:08 +00:00
Wanda 66ad0a207e build: get list of used I/O ports from Design. 
Fixes #1365.
 2024-06-14 17:06:17 +00:00
Catherine 86fdaba2db docs/simulator: improve explanation for resetting the simulation. 2024-06-10 14:06:57 +00:00
Catherine 6a2e789333 sim: forbid adding stimuli to a running simulation. 
Fixes #1368.
 2024-06-10 12:55:18 +00:00
Catherine c649045f35 lib.data: add a diagnostic for slicing data.View. 
This is meaningless for a view but meaningful for the underlying value.

Fixes #1375.
 2024-06-10 12:35:03 +00:00
Catherine 0140fe27e2 hdl._dsl: forbid empty string as submodule name. 
This is semantically ambiguous and breaks the RTLIL emitter.

Fixes #1209.
 2024-06-10 12:29:20 +00:00
Catherine 7870eb344b sim: document. 
This commit includes additional non-documentation changes, related to
issues found while documenting it:
- `Simulator.run_until()` no longer accepts a `run_passive=` argument.
  Passive no longer exist and in any case defaulting to `False` does not
  make a lot of sense from an API perspective.
- `add_clock()`'s `phase=` argument, when specified, no longer has
  `period/2` added to it. This wasn't the documented behavior in first
  place and it makes no sense to do that.
- `add_clock()` raises a `NameError` if a clock domain does not exist,
  instead of `ValueError`.
- `add_clock()` raises a `DriverConflict` if a clock domain is already
  being driven by a clock, instead of `ValueError`.
- GTKWave is no longer a part of the installation instructions, and both
  Surfer and GTKWave are recommended (in this order).
 2024-06-10 10:34:32 +00:00
Catherine 3c1060f7c7 docs: stdlib/memory: minor style improvement. NFC 2024-06-10 10:34:32 +00:00
Catherine 48a2dc212b sim.pysim: reset testbenches on engine reset. 2024-06-10 10:34:32 +00:00
Catherine e24b9b4983 tests: convert to async simulator syntax. 
This causes one test to fail due to a now-exposed bug.

Co-authored-by: Wanda <wanda-phi@users.noreply.github.com>
 2024-06-10 10:34:32 +00:00
Catherine 7cabe350d9 examples: convert to async simulator syntax. 2024-06-10 10:34:32 +00:00
Catherine d1895108c3 sim: remove dead code. NFC 
This is a remnant of feature added in commit 11f7b887 and removed in
commit 994fa815.
 2024-05-31 13:14:21 +00:00
Catherine f49074f439 vendor._siliconblue: unbreak IO buffer instantiation. 
Bug introduced in 028d5d807 via copy/paste.
 2024-05-30 22:11:30 +00:00
Catherine 8da55299a5 build.plat,vendor._lattice: add Diamond escaping quirk. 
Partially addresses #546.
 2024-05-30 11:21:55 +00:00
Catherine f0dd01eadf vendor._lattice: reflow to 100 columns. NFC 2024-05-30 11:21:55 +00:00
Catherine 855545b6ff docs/stdlib/io: minor documentation clarity improvement. 2024-05-30 10:39:07 +00:00
Wanda 028d5d8073 hdl._ir, lib, vendor: add RequirePosedge, use it whenever required. 2024-05-29 15:49:31 +00:00
Wanda d3c312cf96 Implement RFC 55: New lib.io components. 2024-05-22 13:47:13 +00:00
Marek Materzok 51e0262710 sim: group signal traces according to their function. 2024-05-22 08:47:35 +00:00
Catherine 89eae72a41 sim: check type of testbench when adding one. 
Fixes #1363.
 2024-05-22 01:05:23 +00:00
Catherine d9b9c49159 editorconfig: use 2-space indentation for YAML. 2024-05-22 01:05:23 +00:00
Catherine 8c83227d15 pyproject: don't put the entire LICENSE file in PyPI metadata. 
It looks very ugly.
 2024-05-22 01:05:23 +00:00
Catherine 324c37f9fa docs/stdlib/io: document I/O buffer library. 2024-05-21 15:58:59 +00:00
Catherine e2b47c1a9e pyproject: use pdm-backend~=2.3.0. 2024-05-20 19:56:19 +00:00
Catherine c1666adf30 build.plat: allow spaces in environment variables on Windows. 
Specifically, allow spaces in:
- set AMARANTH_ENV_<toolchain>=c:\program files\...
- set <tool>=c:\program files\...
 2024-05-18 01:05:21 +00:00
Wanda 77dab7884c hdl._dsl: raise an error when modifying an already-elaborated Module. 
This renames the `FrozenMemory` exception to `AlreadyElaborated`
and reuses it for modules.

Fixes #1350.
 2024-05-18 00:59:00 +00:00
Bastian Löher 1d03c3498d vendor.xilinx: Replace use of _reset with _init in Xilinx platform. 2024-05-18 00:58:14 +00:00
Catherine ae71cf6601 docs/guide: remove the warning for array resource exhaustion. 
It is no longer relevant in a NIR world.
 2024-05-13 02:39:40 +00:00
Catherine 001f7c78dc docs: note that Array and ArrayLayout are distinct. 2024-05-13 02:39:40 +00:00
Catherine cd679dd9b3 docs: exempt https://amaranth-lang.org/schema/ (exact) from linkcheck. 2024-05-11 08:55:53 +00:00
Catherine 631ef564aa CI: fix schema publishing. 
Previously, two concurrent jobs were used, which caused a race condition.
Serialize them.
 2024-05-10 13:44:44 +00:00
Jean-François Nguyen 496432edaa Implement RFC 30: Component metadata. 
Co-authored-by: Catherine <whitequark@whitequark.org>
 2024-05-10 13:17:24 +00:00
Wanda 1d2b9c309e back.rtlil: set read port init to all-x. 
This is an unfortunate necessity needed to fix memory inference regressions
introduced when we switched to using v2 cells. A better approach, compatible
with RFC 54, will need to be figured out for Amaranth 0.6.

Fixes #1011.
 2024-05-09 02:38:53 +00:00
Wanda 4b49284ccb hdl._ir: derive DriverConflict from Exception instead of UserWarning. 2024-05-09 02:11:23 +00:00
Wanda 14929b9499 vendor: add AMDPlatform as an alias for XilinxPlatform. 
Fixes #1349.
 2024-05-07 23:52:39 +00:00
Catherine 994fa81599 Implement RFC 36. 
This feature does not exactly follow the RFC because the RFC as written
is not implementable; the treatment of async resets in `tick()` triggers
had to be changed. In addition, iterating a trigger was made to watch
for missed events, in case the body of the `async for` awaited for too
long.

Co-authored-by: Wanda <wanda-phi@users.noreply.github.com>
 2024-05-06 11:09:46 +00:00
Catherine 5e59189c2b hdl: track domain renames in IR. 
Co-authored-by: Wanda <wanda@phinode.net>
 2024-05-06 11:09:46 +00:00
Catherine f637530093 sim: move Command from core to _pycoro. 
Simulator commands are deprecated and will be removed once RFC 36 is
implemented and released. They are an artifact of the old API.
 2024-05-06 11:09:46 +00:00
Catherine 78a289e5aa sim: {add,remove}_trigger→{add,remove}_signal_trigger 2024-05-06 11:09:46 +00:00
Catherine eef248a080 pyproject: write XML coverage after running the testsuite. 
This is particularly useful with IDEs that can display coverage in
the editor, e.g. VS Code with the "Coverage Gutters" extension.
 2024-05-06 11:09:46 +00:00
Wanda 25c3531e93 vendor.*: fix [io]_domain propagation when creating buffers. 
Closes #1347.
 2024-05-05 04:57:52 +00:00
Wanda 9e82d54302 lib.io: make [io]_domain attributes always present. 
Having conditionally-present attributes causes more problems than it's
worth (see #1347). Just make them contain `None` when irrelevant.
 2024-05-05 04:57:52 +00:00
Richard Meadows 653a51b421 vendor._lattice: OFS1P3DX -> OFD1P3DX and IFS1P3DX -> IFD1P3DX for nexus 
More specialized buffers required
 2024-05-04 21:03:01 +00:00
Sohaib Errabii 79d9f5e8a4 docs._code: led to led.o 2024-05-04 20:01:22 +00:00