Commit graph

124 commits

Author SHA1 Message Date
whitequark 3e2ecdf2fb build.res,vendor: place clock constraint on port, not net, if possible.
For most toolchains, these are functionally identical, although ports
tend to work a bit better, being the common case. For Vivado, though,
it is necessary to place them on the port because its timing analyzer
considers input buffer delay.

Fixes #301.
2020-02-06 23:37:15 +00:00
whitequark 5888f29c1f xilinx_{7series,ultrascale}: run report_methodology.
This can expose important timing issues, such as #301.
2020-02-06 19:38:21 +00:00
Mike Walters b72c3fc7f6 vendor.lattice_ecp5: support internal oscillator (OSCG). 2020-01-31 03:18:36 +00:00
Sylvain Munaut 7792a6cd9f vendor.lattice_{ice40,ecp5}: Support .il (RTLIL) files in extra_files 2020-01-31 02:56:19 +00:00
whitequark e18385b613 Remove everything deprecated in nmigen 0.1.
Closes #275.
2020-01-12 13:59:26 +00:00
schwigi 8184efd612 vendor.intel: fix output enable width for XDR=0 case.
Fixes #297.
2020-01-09 10:09:35 +00:00
Dan Ravensloft 72cfdb0c93 vendor.intel: silence meaningless warnings in nMigen files 2019-12-01 00:07:48 +00:00
Jean-François Nguyen f207f3f620 vendor.xilinx_*: Set IOB attribute on cels instead of nets. 2019-11-18 15:04:03 +00:00
whitequark 1bb3fa861c vendor.lattice_ice40: fix commit 88649def. 2019-10-14 15:55:11 +00:00
whitequark b3a8a43152 vendor.lattice_{ice40,ecp5}: fix typo. 2019-10-13 22:17:46 +00:00
whitequark 88649defda vendor.lattice_ice40: use pcf files instead of pre-pack Python scripts.
This allows to use nextpnr-ice40 built without Python with nMigen.
Requires nextpnr revision
YosysHQ/nextpnr@8c0610e84f or newer.
2019-10-13 21:56:40 +00:00
whitequark ccd28b40c2 vendor.lattice_{ice40,ecp5}: emit Verilog as well, for debugging. 2019-10-13 18:04:33 +00:00
Emily a783e4645d Refactor build script toolchain lookups.
Now environment variable overrides no longer infect the build scripts.

_toolchain.overrides is dropped as probably misguided in the first place.

Fixes #251.
2019-10-13 13:53:24 +00:00
whitequark 9fe27a15ad vendor.xilinx_ultrascale: new supported family. 2019-10-10 16:35:48 +00:00
whitequark bfd4538df0 xilinx_7series: add grade platform property.
For some devices grade has to be omitted, so it is optional.
2019-10-10 16:33:00 +00:00
whitequark ef741594b5 vendor.lattice_machxo2: new supported family. 2019-10-10 16:22:29 +00:00
whitequark a7cc88f3d4 vendor: yosys is a required tool for all Verilog-based flows. 2019-10-10 14:38:09 +00:00
whitequark 8021e2dd76 vendor.intel: add Quartus support.
Co-authored-by: Dan Ravensloft <dan.ravensloft@gmail.com>
2019-10-10 00:35:13 +00:00
whitequark b9e57fd67b build.plat,vendor: always synchronize reset in default sync domain.
This change achieves two related goals.

First, default_rst is no longer assumed to be synchronous to
default_clk, which is  the safer option, since it can be connected to
e.g. buttons on some evaluation boards.

Second, since the power-on / configuration reset is inherently
asynchronous to any user clock, the default create_missing_domain()
behavior is to use a reset synchronizer with `0` as input. Since,
like all reset synchronizers, it uses Signal(reset=1) for its
synchronization stages, after power-on reset it keeps its subordinate
clock domain in reset, and releases it after fabric flops start
toggling.

The latter change is helpful to architectures that lack an end-of-
configuration signal, i.e. most of them. ECP5 was already using
a similar scheme (and is not changed here). Xilinx devices with EOS
use EOS to drive a BUFGMUX, which is more efficient than using
a global reset when the design does not need one; Xilinx devices
without EOS use the new scheme. iCE40 requires a post-configuration
timer because of BRAM silicon bug, and was changed to add a reset
synchronizer if user clock is provided.
2019-10-09 20:02:33 +00:00
whitequark 53bb4300a3 build.plat: strip internal attributes from Verilog output.
Although useful for debugging, most external tools often complain
about such attributes (with notable exception of Vivado). As such,
it is better to emit Verilog with these attributes into a separate
file such as `design.debug.v` and only emit the attributes that were
explicitly placed by the user to `design.v`.

This still leaves the (*init*) attribute. See #220 for details.
2019-09-24 14:56:00 +00:00
whitequark f87c00e6c3 build.plat,lib.cdc,vendor: unify platform related diagnostics. NFC. 2019-09-24 14:14:45 +00:00
whitequark 0858b8bf6c lib.cdc: specify maximum input delay in seconds.
Since we use hertz elsewhere, this provides for easy conversions.

Also, cast the delay to string before applying it in xilinx_7series,
to avoid stripping the fractional digits.

Closes #234.
2019-09-24 12:30:10 +00:00
whitequark b43d2d36e8 vendor.xilinx_spartan_3_6: explain why ASYNC_REG is used. NFC. 2019-09-24 12:22:29 +00:00
Kate Temkin d14366450b vendor.lattice_ecp5: correct a typo in tristate buffer generation 2019-09-24 11:53:38 +00:00
Darrell Harmon f3a8880cb8 vendor.xilinx_7series: apply false path / max delay constraints. 2019-09-24 00:47:54 +00:00
whitequark da53048ad4 vendor.xilinx_7series: simplify. NFC. 2019-09-23 20:27:42 +00:00
whitequark 6d8590a391 vendor.xilinx_7series: override reset synchronizer. 2019-09-23 20:15:29 +00:00
whitequark 86f0f12b58 lib.cdc: avoid modifying synchronizers in their elaborate() method. 2019-09-23 16:42:44 +00:00
Darrell Harmon 51f03bb509 vendor.xilinx_spartan_3_6: override reset synchronizer. 2019-09-23 16:28:15 +00:00
whitequark 8deb13cea3 lib.cdc: MultiReg→FFSynchronizer.
Fixes #229.
2019-09-23 14:18:45 +00:00
whitequark 59acd5d5a5 vendor.lattice_ice40: fix required tool list for iCECube2. NFC. 2019-09-22 07:18:37 +00:00
whitequark 5f9b8ec1eb vendor.lattice_ecp5: simplify quoting. NFC.
See commit ee1ad2da.
2019-09-22 07:17:12 +00:00
whitequark 3d62dac1cb vendor.lattice_ice40: add iCECube support.
This also makes some iCE40 and ECP5 overrides more consistent.
2019-09-21 14:45:17 +00:00
whitequark 07a82ed70e build.plat: NMIGEN_<toolchain>_env→NMIGEN_ENV_<toolchain>
This is more consistent with other environment variables nMigen uses.
2019-09-21 12:23:53 +00:00
whitequark 91ef2f58e3 vendor.lattice_{ecp5,ice40}: allow clock constraints on arbitrary signals.
Fixes #88.
2019-09-20 16:26:27 +00:00
Darrell Harmon af7224de5d vendor.xilinx_{7series,spartan3_6}: specialize MultiReg.
Vivado/ISE would otherwise infer an SRL16 from a MultiReg in some cases.
2019-09-20 15:13:27 +00:00
whitequark 9ea3ff7ae2 build.plat: bypass tool detection if NMIGEN_*_env is set.
It's not practical to detect tools within the toolchain environment
for various reasons, so just assume the tools are there if the user
says they are.

Before this commit, the tools would be searched outside the toolchain
environment, which of course would always fail for Vivado, ISE, etc.
2019-09-12 21:56:48 +00:00
whitequark c8f8c09f29 vendor.xilinx_7series: Vivado requires bash on *nix as well. 2019-09-12 21:49:08 +00:00
whitequark 8c30147e39 build.plat,vendor: allow clock constraints on arbitrary signals.
Currently only done for Synopsys based toolchains (i.e. not nextpnr).

Refs #88.
2019-09-11 23:35:43 +00:00
Darrell Harmon 27cedf4302 vendor.lattice_ecp5: pass ecppack_opts to ecppack. 2019-09-10 03:32:36 +00:00
Emily c4e8ac734f _toolchain,build.plat,vendor.*: add required_tools list and checks. 2019-08-31 00:05:47 +00:00
whitequark 4e91710933 vendor.lattice_ecp5: drive GSR synchronous to user clock by default.
Fixes #167.
2019-08-30 14:26:49 +00:00
whitequark b4b5d9e2ef vendor.lattice_ecp5: revert default toolchain to Trellis.
This was unintentionally changed in 7fc1058e.
2019-08-25 08:07:00 +00:00
whitequark 7fc1058ed2 vendor.lattice_ecp5: add Diamond support. 2019-08-22 21:36:24 +00:00
whitequark c77274c1ad vendor: eliminate unnecessary LUT instantiation.
Fixes #165.
2019-08-22 21:29:20 +00:00
Darrell Harmon 6737ef79f9 vendor.xilinx_series7: use STARTUPE2, not STARTUPE3.
STARTUPE3 is for Ultrascale.
2019-08-21 22:25:55 +00:00
whitequark 5889e62668 vendor.lattice_ice40: remove --placer heap default option.
It is not the place of nMigen to decide on this default, since both
SA and HeAP have valid uses that are not covered by the other.
2019-08-21 21:32:38 +00:00
whitequark 531040d2fd vendor: style. NFC. 2019-08-21 21:32:36 +00:00
whitequark 25b280dba1 build.plat: remove TemplatedPlatform.unix_interpreter.
Vendor toolchains generally require far more workarounds than this,
and we already have a perfectly fine way of overriding templates.
2019-08-21 21:02:13 +00:00
whitequark 77012fc143 vendor.lattice_ice40: use a local clock domain in create_missing_domain(). 2019-08-19 21:46:44 +00:00